1. Field of the Invention
The present invention relates to a technique for mounting semiconductor elements such as memory elements on a circuit board.
2. Related Art
In recent years, with increases in speed and capacity of an information processing device such as a personal computer, the capacity of a memory module used in such an information processing device must be increased. For this reason, conventional various techniques for improving a mounting density of semiconductor elements mounted on a memory module used in a personal computer or the like are proposed (for example, disclosed in Japanese Patent Laid-Open Publication No. 11-307718).
As one packaging technique for mounting elements on a circuit board in a high density, a chip size package (CSP) technique is known. The chip size package technique is directed to decrease a size of a package and increase mounting density. That technique is expected to become a mainstream of packaging technique in the future.
In general, it would be effective to mount memories as many as possible in a limited area to increase the capacity of a memory module.
In a memory IC packaged in a chip size package method which will be expected as the mainstream in the future, the memory IC itself is miniaturized to increase a mounting density. However, since the memory IC has solder balls formed on an entire surface in a side on which a printed wiring board (PCB) is mounted, the memory IC cannot be easily realized in the same structure as that of high-density mounting realized by using a stacked structure in a conventional thin small outline package (TSOP) technique having lead lines arranged on only the left and right sides.
The present invention has been made to solve the above problem, and has as its object to provide a circuit mounting method and a circuit mounted board which can mount semiconductor element as a high density.
In the first aspect of the invention, a method of mounting circuits on a board with the board having a recessed portion, comprises mounting a first semiconductor element packaged in a chip size package method in the recessed portion, and mounting a second semiconductor element on the board to cover the recessed portion. Thus, two semiconductor elements can be mounted in an area required to mount one semiconductor element, and efficiency for mounting semiconductor elements on the board can be improved.
In the second aspect of the invention, a method of mounting circuits comprises stacking a plurality of first boards up, each of first boards having a male connector and a female connector engaging the male connector through the connectors, the male and female connectors disposed on one surface and the other surface of the first board, respectively, each first board mounted with a semiconductor element mounted on one of the surfaces, and mounting the first boards on a second board. Thus, the number of mounted semiconductor elements per predetermined area can be increased, thereby improving the mounting efficiency.
In the third aspect of the invention, a method of mounting circuits comprises stacking a plurality of packages up, each of package being formed by encapsulating, with a resin, an upper board, a lower board, and a semiconductor element arranged between the upper and lower boards and electrically connected to the respective boards through solder balls, the package further having solder balls for establishing electric connection to an external board, and mounting the packages on a board. Thus, the number of mounted semiconductor elements per predetermined area can be increased, thereby improving the mounting efficiency.
In the fourth aspect of the invention, a method of mounting circuits comprises disposing a semiconductor element in a first board having a hollow portion, the semiconductor element being mounted in the hollow portion through solder balls, stacking a plurality of the first board up, and mounting the first boards on a second board. Thus, the number of mounted semiconductor elements per predetermined area can be increased, thereby improving the mounting efficiency.
In the fifth aspect of the invention, a method of mounting circuits comprises mounting a plurality of first boards on which semiconductor elements are mounted on a second board through leads. The first boards are arranged at predetermined inclination angles with respect to the second board. Thus, the mounting efficiency can be improved and the height of the circuit mounted board can be reduced.
In the sixth aspect of the invention, a circuit mounted board comprises a board on which a semiconductor element is mounted and which has a recessed portion, a first semiconductor element being mounted in the recessed portion, and a second semiconductor element being mounted on the board to cover the recessed portion, where the first semiconductor element is packaged in a chip size package method. Thus, two semiconductor elements can be mounted in an area required to mount one semiconductor element, and efficiency for mounting semiconductor elements on the board can be improved.
In the seventh aspect of the invention, a circuit mounted board comprises a plurality of first boards each of which has a male connector and a female connector engaging the male connector, the male and female connectors disposed on one surface and the other surface of the first board, respectively, each first board mounted with a semiconductor element mounted on one of the surfaces, and a second board which is mounted with the plurality of first boards which are stacked up through the connectors. Thus, the number of mounted semiconductor elements per predetermined area can be increased, thereby improving the mounting efficiency.
In the eighth aspect of the invention, a circuit mounted board comprises a plurality of packages, each of package being formed by encapsulating with a resin an upper board, a lower board, and a semiconductor element, the semiconductor element arranged between the upper and lower boards and electrically connected to the respective boards through first solder balls, the package further having second solder balls for establishing electric connection to an external board, and a board which is mounted with the plurality of packages which are stacked up through the second solder balls. Thus, the number of mounted semiconductor elements per predetermined area can be increased, thereby improving the mounting efficiency.
In the ninth aspect of the invention, a circuit mounted board comprises a plurality of first board each having a hollow portion and a semiconductor element mounted in the hollow portion through first solder balls, and a second board which is mounted with the plurality of first boards which are stacked up through second solder balls are mounted. Thus, the number of mounted semiconductor elements per predetermined area can be increased, thereby improving the mounting efficiency.
In the tenth aspect of the invention, a circuit mounted board comprises a plurality of first boards on each of which semiconductor element is mounted, and a second board on which the plurality of first boards are mounted through leads. The first boards are arranged at predetermined inclination angles with respect to the second board. Thus, the mounting efficiency can be improved and the height of the circuit mounted board can be reduced.
In the eleventh aspect of the invention, a semiconductor device comprises first and second semiconductor elements which are vertically stacked up, an internal board on which those semiconductor elements are mounted, and solder balls for establishing electric connection to an external board. The first and second semiconductor elements, the internal board and the solder balls are encapsulated with a resin. The upper semiconductor element is connected to the internal board by wire bonding, and the lower semiconductor element is electrically connected to the internal board through the solder balls. Thus, the number of mounted semiconductor elements per predetermined area can be increased, thereby improving the mounting efficiency.